The formation of various integrated circuit (IC) structures on a semiconductor wafer typically involves lithographic processes. Lithographic processors are used to transfer a pattern of a photomask to the semiconductor wafer. For example, a pattern may be formed on the wafer by passing light energy through a reticle, which transfers the pattern to the photoresist layer. After exposing a photoresist layer, a development cycle is performed. In order to increase the resolution and the quality of the exposure of the photoresist, a reticle is usually configured to expose only a portion of the wafer at a time. Each portion of the wafer that is exposed at once is referred to as an exposure field or a “shot” area. Accordingly, developing an entire wafer usually requires a lithographic processor to take multiple shots.
FIG. 1A illustrates a wafer 100 having a plurality of shots 102 disposed thereon. Each exposure or shot area 102 may include one or more chips 104 separated by scribe lines or “streets” 106 as illustrated in FIGS. 1B and 1C. Additionally, each shot area may include one or more alignment and monitor patterns, e.g., frame cell structure segments 108, which are disposed outside of the area that includes the chips 104. The frame cell structure segments 108 are typically fixed segments within a shot area and that are located around the periphery of a shot. The frame cell structure segments are usually arranged in a U-frame configuration as illustrated FIG. 1B or in an O-frame configuration 108a as illustrated in FIG. 1C. The alignment and monitor patterns 108, 108a are used to align or monitor process variations of a shot 102. Additionally, the frame cell segments 108, 108a provide areas to separate adjacent shots 102 when the wafer has been developed. The exposure is performed by interlocking, but not overlapping, the frame cell structure segments 108 of adjacent shots as illustrated in FIGS. 2A and 2B.
In conventional processing methods as illustrated in FIG. 1A, shots 102 are fully aligned with adjacent shots in both the x- and y-directions. At the periphery of the wafer, the dies in each edge shot have vacant space adjacent thereto, between the outer sides of the dies and the circumference of the wafer. As wafer sizes increase from 300 mm to 450 mm, the number of edge shots will also increase as a 450 mm wafer has approximately 1.5 times the circumference of a 300 mm wafer, increasing the amount of vacant, wasted space on the wafer.
Accordingly, an improved frame structure and shot layout methodology are desirable.